arch/avr32/include/arch/compiler-gcc.h File Reference
Compiler abstraction layer: AVR32 GCC specifics. More...
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Defines | |
| #define | avr32_write_sr(x) asm volatile("mtsr 0, %0" :: "r"(x) : "cc") |
| Write the value x to the Status Register. | |
| #define | avr32_set_sr_bit(x) __builtin_ssrf(x) |
| Set bit x in the Status Register. | |
| #define | avr32_clear_sr_bit(x) __builtin_csrf(x) |
| Clear bit x in the Status Register. | |
| #define | cpu_irq_enable() |
| Disable interrupts globally. | |
| #define | cpu_irq_disable() |
| Enable interrupts globally. | |
Functions | |
| static unsigned long | bit_reverse (unsigned long word) |
| Reverse the order of the bits in word. | |
Detailed Description
Compiler abstraction layer: AVR32 GCC specifics.
- Compiler: GNU GCC for AVR32
- Supported devices: All AVR32 devices
- AppNote:
Definition in file compiler-gcc.h.
Define Documentation
| #define avr32_clear_sr_bit | ( | x | ) | __builtin_csrf(x) |
Clear bit x in the Status Register.
Definition at line 71 of file compiler-gcc.h.
Referenced by softirq_enable().
| #define avr32_set_sr_bit | ( | x | ) | __builtin_ssrf(x) |
Set bit x in the Status Register.
Definition at line 66 of file compiler-gcc.h.
Referenced by softirq_disable().
| #define avr32_write_sr | ( | x | ) | asm volatile("mtsr 0, %0" :: "r"(x) : "cc") |
Write the value x to the Status Register.
Write the value x to the status register and make sure that the compiler doesn't assume that the condition register is valid afterwards.
Definition at line 51 of file compiler-gcc.h.
Referenced by cpu_irq_restore().
| #define cpu_irq_disable | ( | ) |
Value:
do { \ avr32_set_sr_bit(SYSREG_SR_GM_BIT); \ barrier(); \ } while (0)
This implies a barrier to ensure that memory operations don't "leak" out of the critical section.
Definition at line 91 of file compiler-gcc.h.
Referenced by cpu_irq_save(), msc_read_worker(), msc_write_worker(), softirq_enable(), softirq_priv_do_pending(), udc_ep_submit_in_req(), udc_ep_submit_out_req(), usbb_udc_submit_in_queue(), and usbb_udc_submit_out_queue().
| #define cpu_irq_enable | ( | ) |
Value:
do { \ barrier(); \ avr32_clear_sr_bit(SYSREG_SR_GM_BIT); \ } while (0)
This implies a barrier to ensure that memory operations don't "leak" out of the critical section.
Definition at line 79 of file compiler-gcc.h.
Referenced by msc_read_worker(), msc_write_worker(), softirq_enable(), softirq_priv_do_pending(), udc_ep_submit_in_req(), udc_ep_submit_out_req(), usbb_udc_submit_in_queue(), and usbb_udc_submit_out_queue().
Function Documentation
| static unsigned long bit_reverse | ( | unsigned long | word | ) | [inline, static] |
Reverse the order of the bits in word.
Definition at line 56 of file compiler-gcc.h.
Referenced by __ffs().
