flash_drv.h

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00001 /*This file has been prepared for Doxygen automatic documentation generation.*/
00014 
00015 /* Copyright (c) 2007, Atmel Corporation All rights reserved.
00016  *
00017  * Redistribution and use in source and binary forms, with or without
00018  * modification, are permitted provided that the following conditions are met:
00019  *
00020  * 1. Redistributions of source code must retain the above copyright notice,
00021  * this list of conditions and the following disclaimer.
00022  *
00023  * 2. Redistributions in binary form must reproduce the above copyright notice,
00024  * this list of conditions and the following disclaimer in the documentation
00025  * and/or other materials provided with the distribution.
00026  *
00027  * 3. The name of ATMEL may not be used to endorse or promote products derived
00028  * from this software without specific prior written permission.
00029  *
00030  * THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
00031  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00032  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
00033  * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
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00038  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
00039  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00040  */
00041 
00042 
00043 #ifndef FLASH_DRV_H
00044 #define FLASH_DRV_H
00045 
00046 //_____ I N C L U D E S ______________________________________________________
00047 
00048 #include "config.h"
00049 
00050 
00051 //_____ M A C R O S ________________________________________________________
00052 
00055 #define Flash_read_id1()            ( flash_read_sig(0x0000))  
00056 #define Flash_read_id2()            ( flash_read_sig(0x0002))  
00057 #define Flash_read_id3()            ( flash_read_sig(0x0004))  
00058 #define Flash_read_osccal()         ( flash_read_sig(0x0001))  
00059 #define Flash_read_sn(pos)          ( flash_read_sig((0x07*2)+pos))
00060 #define SN_LENGTH                   10                         
00061 
00062 
00065 #define Flash_read_fuse_low()       ( flash_read_fuse(0x0000)) 
00066 #define Flash_read_fuse_high()      ( flash_read_fuse(0x0003)) 
00067 #define Flash_read_fuse_extended()  ( flash_read_fuse(0x0002)) 
00068 #define Flash_read_lock()           ( flash_read_fuse(0x0001)) 
00069 
00070 
00073 #define Is_OCD_enable()             (0==(Flash_read_fuse_high()&(1<<FUSE_OCDEN_bp)))  
00074 #define Is_JTAG_enable()            (0==(Flash_read_fuse_high()&(1<<FUSE_JTAGEN_bp))) 
00075 
00076 
00077 
00080 #define FUSE_BOOTRST_bp    0  // Select Reset Vector
00081 #define FUSE_BOOTSZ0_bp    1  // Select Boot Size
00082 #define FUSE_BOOTSZ1_bp    2  // Select Boot Size
00083 #define FUSE_EESAVE_bp     3  // EEPROM memory is preserved through chip erase
00084 #define FUSE_WDTON_bp      4  // Watchdog timer always on
00085 #define FUSE_SPIEN_bp      5  // Enable Serial programming and Data Downloading
00086 #define FUSE_JTAGEN_bp     6  // Enable JTAG
00087 #define FUSE_OCDEN_bp      7  // Enable OCD
00089 
00090 
00091 //_____ D E C L A R A T I O N S ____________________________________________
00092 
00099 U8    flash_read_sig(unsigned long adr);
00100 
00107 U8    flash_read_fuse(unsigned long adr);
00108 
00109 
00110 #endif  // FLASH_DRV_H
00111 
00112 
00113 

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