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00046 #include "config.h"
00047 #include "ctrl_access.h"
00048
00049
00050
00051
00052 #if (ACCESS_MEM_TO_RAM == ENABLED)
00053 #include "modules/file_system/fat.h"
00054 #endif
00055
00056
00058
00059
00060
00061
00062 #ifndef LUN_0
00063 # error LUN_0 must be defined with ENABLE or DISABLE in conf_access.h
00064 #endif
00065 #ifndef LUN_1
00066 # error LUN_1 must be defined with ENABLE or DISABLE in conf_access.h
00067 #endif
00068 #ifndef LUN_2
00069 # error LUN_2 must be defined with ENABLE or DISABLE in conf_access.h
00070 #endif
00071 #ifndef LUN_3
00072 # error LUN_3 must be defined with ENABLE or DISABLE in conf_access.h
00073 #endif
00074 #ifndef LUN_4
00075 # error LUN_4 must be defined with ENABLE or DISABLE in conf_access.h
00076 #endif
00077 #ifndef LUN_5
00078 # error LUN_5 must be defined with ENABLE or DISABLE in conf_access.h
00079 #endif
00080 #ifndef LUN_6
00081 # error LUN_6 must be defined with ENABLE or DISABLE in conf_access.h
00082 #endif
00083 #ifndef LUN_7
00084 # error LUN_7 must be defined with ENABLE or DISABLE in conf_access.h
00085 #endif
00086 #ifndef LUN_USB
00087 # error LUN_USB must be defined with ENABLE or DISABLE in conf_access.h
00088 #endif
00089
00090
00091 #if (LUN_0 == ENABLE)
00092 #define LUN_0_EN 1
00093 U8 code lun0_name[]=LUN_0_NAME;
00094 #else
00095 #define LUN_0_EN 0
00096 #endif
00097 #if (LUN_1 == ENABLE)
00098 #define LUN_1_EN 1
00099 U8 code lun1_name[]=LUN_1_NAME;
00100 #else
00101 #define LUN_1_EN 0
00102 #endif
00103 #if (LUN_2 == ENABLE)
00104 #define LUN_2_EN 1
00105 U8 code lun2_name[]=LUN_2_NAME;
00106 #else
00107 #define LUN_2_EN 0
00108 #endif
00109 #if (LUN_3 == ENABLE)
00110 #define LUN_3_EN 1
00111 U8 code lun3_name[]=LUN_3_NAME;
00112 #else
00113 #define LUN_3_EN 0
00114 #endif
00115 #if (LUN_4 == ENABLE)
00116 #define LUN_4_EN 1
00117 U8 code lun4_name[]=LUN_4_NAME;
00118 #else
00119 #define LUN_4_EN 0
00120 #endif
00121 #if (LUN_5 == ENABLE)
00122 #define LUN_5_EN 1
00123 U8 code lun5_name[]=LUN_5_NAME;
00124 #else
00125 #define LUN_5_EN 0
00126 #endif
00127 #if (LUN_6 == ENABLE)
00128 #define LUN_6_EN 1
00129 U8 code lun6_name[]=LUN_6_NAME;
00130 #else
00131 #define LUN_6_EN 0
00132 #endif
00133 #if (LUN_7 == ENABLE)
00134 #define LUN_7_EN 1
00135 U8 code lun7_name[]=LUN_7_NAME;
00136 #else
00137 #define LUN_7_EN 0
00138 #endif
00139 #if (LUN_USB == ENABLE)
00140 #define LUN_USB_EN 1
00141 U8 code lunusb_name[]=LUN_USB_NAME;
00142 #else
00143 #define LUN_USB_EN 0
00144 #endif
00145
00146
00147 #define LUN_ID_0 (0)
00148 #define LUN_ID_1 (LUN_0_EN)
00149 #define LUN_ID_2 (LUN_0_EN+LUN_1_EN)
00150 #define LUN_ID_3 (LUN_0_EN+LUN_1_EN+LUN_2_EN)
00151 #define LUN_ID_4 (LUN_0_EN+LUN_1_EN+LUN_2_EN+LUN_3_EN)
00152 #define LUN_ID_5 (LUN_0_EN+LUN_1_EN+LUN_2_EN+LUN_3_EN+LUN_4_EN)
00153 #define LUN_ID_6 (LUN_0_EN+LUN_1_EN+LUN_2_EN+LUN_3_EN+LUN_4_EN+LUN_5_EN)
00154 #define LUN_ID_7 (LUN_0_EN+LUN_1_EN+LUN_2_EN+LUN_3_EN+LUN_4_EN+LUN_5_EN+LUN_6_EN)
00155 #define MAX_LUN (LUN_0_EN+LUN_1_EN+LUN_2_EN+LUN_3_EN+LUN_4_EN+LUN_5_EN+LUN_6_EN+LUN_7_EN)
00156 #define LUN_ID_USB (MAX_LUN)
00157
00158
00159 #if (MAX_LUN == 0 && LUN_USB ==DISABLE )
00160 #error No memory is active in conf_access.h
00161 #endif
00162
00163
00164
00165
00166
00167
00172 U8 get_nb_lun()
00173 {
00174 #if (LUN_USB == ENABLED)
00175 host_ms_max_lun=0;
00176 for(dms_selected=0;dms_selected<dms_connected;dms_selected++)
00177 {
00178 host_ms_max_lun += Host_getlun();
00179 }
00180 return (MAX_LUN + host_ms_max_lun);
00181 #else
00182 return MAX_LUN;
00183 #endif
00184 }
00185
00186
00191 U8 get_cur_lun()
00192 {
00193 return 0;
00194 }
00195
00196
00210 Ctrl_status mem_test_unit_ready( U8 lun )
00211 {
00212 switch( lun )
00213 {
00214 # if (LUN_0 == ENABLE)
00215 case LUN_ID_0:
00216 return Lun_0_test_unit_ready();
00217 break;
00218 # endif
00219 # if (LUN_1 == ENABLE)
00220 case LUN_ID_1:
00221 return Lun_1_test_unit_ready();
00222 break;
00223 # endif
00224 # if (LUN_2 == ENABLE)
00225 case LUN_ID_2:
00226 return Lun_2_test_unit_ready();
00227 break;
00228 # endif
00229 # if (LUN_3 == ENABLE)
00230 case LUN_ID_3:
00231 return Lun_3_test_unit_ready();
00232 break;
00233 # endif
00234 # if (LUN_4 == ENABLE)
00235 case LUN_ID_4:
00236 return Lun_4_test_unit_ready();
00237 break;
00238 # endif
00239 # if (LUN_5 == ENABLE)
00240 case LUN_ID_5:
00241 return Lun_5_test_unit_ready();
00242 break;
00243 # endif
00244 # if (LUN_6 == ENABLE)
00245 case LUN_ID_6:
00246 return Lun_6_test_unit_ready();
00247 break;
00248 # endif
00249 # if (LUN_7 == ENABLE)
00250 case LUN_ID_7:
00251 return Lun_7_test_unit_ready();
00252 break;
00253 # endif
00254 # if (LUN_USB == ENABLE)
00255 default:
00256 return Lun_usb_test_unit_ready(lun - LUN_ID_USB);
00257 break;
00258 # endif
00259 }
00260 return CTRL_FAIL;
00261 }
00262
00263
00273 Ctrl_status mem_read_capacity( U8 lun , U32 _MEM_TYPE_SLOW_ *u32_last_sector )
00274 {
00275 switch( lun )
00276 {
00277 # if (LUN_0 == ENABLE)
00278 case LUN_ID_0:
00279 return Lun_0_read_capacity( u32_last_sector );
00280 break;
00281 # endif
00282 # if (LUN_1 == ENABLE)
00283 case LUN_ID_1:
00284 return Lun_1_read_capacity( u32_last_sector );
00285 break;
00286 # endif
00287 # if (LUN_2 == ENABLE)
00288 case LUN_ID_2:
00289 return Lun_2_read_capacity( u32_last_sector );
00290 break;
00291 # endif
00292 # if (LUN_3 == ENABLE)
00293 case LUN_ID_3:
00294 return Lun_3_read_capacity( u32_last_sector );
00295 break;
00296 # endif
00297 # if (LUN_4 == ENABLE)
00298 case LUN_ID_4:
00299 return Lun_4_read_capacity( u32_last_sector );
00300 break;
00301 # endif
00302 # if (LUN_5 == ENABLE)
00303 case LUN_ID_5:
00304 return Lun_5_read_capacity( u32_last_sector );
00305 break;
00306 # endif
00307 # if (LUN_6 == ENABLE)
00308 case LUN_ID_6:
00309 return Lun_6_read_capacity( u32_last_sector );
00310 break;
00311 # endif
00312 # if (LUN_7 == ENABLE)
00313 case LUN_ID_7:
00314 return Lun_7_read_capacity( u32_last_sector );
00315 break;
00316 # endif
00317 # if (LUN_USB == ENABLE)
00318 default:
00319 return Lun_usb_read_capacity( lun - LUN_ID_USB, u32_last_sector );
00320 break;
00321 # endif
00322 }
00323 return CTRL_FAIL;
00324 }
00325
00326
00333 U8 mem_sector_size( U8 lun )
00334 {
00335 # if (LUN_USB == ENABLE)
00336 return (lun < LUN_ID_USB) ? 1 : 1;
00337 #else
00338 return 1;
00339 #endif
00340 }
00341
00342
00352 Bool mem_wr_protect( U8 lun )
00353 {
00354 switch( lun )
00355 {
00356 # if (LUN_0 == ENABLE)
00357 case LUN_ID_0:
00358 return Lun_0_wr_protect();
00359 break;
00360 # endif
00361 # if (LUN_1 == ENABLE)
00362 case LUN_ID_1:
00363 return Lun_1_wr_protect();
00364 break;
00365 # endif
00366 # if (LUN_2 == ENABLE)
00367 case LUN_ID_2:
00368 return Lun_2_wr_protect();
00369 break;
00370 # endif
00371 # if (LUN_3 == ENABLE)
00372 case LUN_ID_3:
00373 return Lun_3_wr_protect();
00374 break;
00375 # endif
00376 # if (LUN_4 == ENABLE)
00377 case LUN_ID_4:
00378 return Lun_4_wr_protect();
00379 break;
00380 # endif
00381 # if (LUN_5 == ENABLE)
00382 case LUN_ID_5:
00383 return Lun_5_wr_protect();
00384 break;
00385 # endif
00386 # if (LUN_6 == ENABLE)
00387 case LUN_ID_6:
00388 return Lun_6_wr_protect();
00389 break;
00390 # endif
00391 # if (LUN_7 == ENABLE)
00392 case LUN_ID_7:
00393 return Lun_7_wr_protect();
00394 break;
00395 # endif
00396 # if (LUN_USB == ENABLE)
00397 default:
00398 return Lun_usb_wr_protect(lun - LUN_ID_USB);
00399 break;
00400 # endif
00401 }
00402 return CTRL_FAIL;
00403 }
00404
00405
00412 Bool mem_removal( U8 lun )
00413 {
00414 switch( lun )
00415 {
00416 # if (LUN_0 == ENABLE)
00417 case LUN_ID_0:
00418 return Lun_0_removal();
00419 break;
00420 # endif
00421 # if (LUN_1 == ENABLE)
00422 case LUN_ID_1:
00423 return Lun_1_removal();
00424 break;
00425 # endif
00426 # if (LUN_2 == ENABLE)
00427 case LUN_ID_2:
00428 return Lun_2_removal();
00429 break;
00430 # endif
00431 # if (LUN_3 == ENABLE)
00432 case LUN_ID_3:
00433 return Lun_3_removal();
00434 break;
00435 # endif
00436 # if (LUN_4 == ENABLE)
00437 case LUN_ID_4:
00438 return Lun_4_removal();
00439 break;
00440 # endif
00441 # if (LUN_5 == ENABLE)
00442 case LUN_ID_5:
00443 return Lun_5_removal();
00444 break;
00445 # endif
00446 # if (LUN_6 == ENABLE)
00447 case LUN_ID_6:
00448 return Lun_6_removal();
00449 break;
00450 # endif
00451 # if (LUN_7 == ENABLE)
00452 case LUN_ID_7:
00453 return Lun_7_removal();
00454 break;
00455 # endif
00456 # if (LUN_USB == ENABLE)
00457 default:
00458 return Lun_usb_removal();
00459 break;
00460 # endif
00461 }
00462 return CTRL_FAIL;
00463 }
00464
00465
00472 #ifdef __GNUC__
00473 U8* mem_name( U8 lun )
00474 #else
00475 U8 code* mem_name( U8 lun )
00476 #endif
00477 {
00478 switch( lun )
00479 {
00480 # if (LUN_0 == ENABLE)
00481 case LUN_ID_0:
00482 return (U8 code*)lun0_name;
00483 break;
00484 # endif
00485 # if (LUN_1 == ENABLE)
00486 case LUN_ID_1:
00487 return (U8 code*)lun1_name;
00488 break;
00489 # endif
00490 # if (LUN_2 == ENABLE)
00491 case LUN_ID_2:
00492 return (U8 code*)lun2_name;
00493 break;
00494 # endif
00495 # if (LUN_3 == ENABLE)
00496 case LUN_ID_3:
00497 return (U8 code*)lun3_name;
00498 break;
00499 # endif
00500 # if (LUN_4 == ENABLE)
00501 case LUN_ID_4:
00502 return (U8 code*)lun4_name;
00503 break;
00504 # endif
00505 # if (LUN_5 == ENABLE)
00506 case LUN_ID_5:
00507 return (U8 code*)lun5_name;
00508 break;
00509 # endif
00510 # if (LUN_6 == ENABLE)
00511 case LUN_ID_6:
00512 return (U8 code*)lun6_name;
00513 break;
00514 # endif
00515 # if (LUN_7 == ENABLE)
00516 case LUN_ID_7:
00517 return (U8 code*)lun7_name;
00518 break;
00519 # endif
00520 # if (LUN_USB == ENABLE)
00521 default:
00522 return (U8 code*)lunusb_name;
00523 break;
00524 # endif
00525 }
00526 return 0;
00527 }
00528
00529
00530
00531
00532
00533
00534
00535
00547 Ctrl_status memory_2_usb( U8 lun , U32 addr , U16 nb_sector )
00548 {
00549 Ctrl_status status=CTRL_FAIL;
00550
00551 switch( lun )
00552 {
00553 # if (LUN_0 == ENABLE)
00554 case LUN_ID_0:
00555 status = Lun_0_read_10(addr , nb_sector);
00556 break;
00557 # endif
00558 # if (LUN_1 == ENABLE)
00559 case LUN_ID_1:
00560 status = Lun_1_read_10(addr , nb_sector);
00561 break;
00562 # endif
00563 # if (LUN_2 == ENABLE)
00564 case LUN_ID_2:
00565 status = Lun_2_read_10(addr , nb_sector);
00566 break;
00567 # endif
00568 # if (LUN_3 == ENABLE)
00569 case LUN_ID_3:
00570 status = Lun_3_read_10(addr , nb_sector);
00571 break;
00572 # endif
00573 # if (LUN_4 == ENABLE)
00574 case LUN_ID_4:
00575 status = Lun_4_read_10(addr , nb_sector);
00576 break;
00577 # endif
00578 # if (LUN_5 == ENABLE)
00579 case LUN_ID_5:
00580 status = Lun_5_read_10(addr , nb_sector);
00581 break;
00582 # endif
00583 # if (LUN_6 == ENABLE)
00584 case LUN_ID_6:
00585 status = Lun_6_read_10(addr , nb_sector);
00586 break;
00587 # endif
00588 # if (LUN_7 == ENABLE)
00589 case LUN_ID_7:
00590 status = Lun_7_read_10(addr , nb_sector);
00591 break;
00592 # endif
00593 }
00594 return status;
00595 }
00596
00608 Ctrl_status usb_2_memory( U8 lun , U32 addr , U16 nb_sector )
00609 {
00610 Ctrl_status status=CTRL_FAIL;
00611
00612 switch( lun )
00613 {
00614 # if (LUN_0 == ENABLE)
00615 case LUN_ID_0:
00616 status = Lun_0_write_10(addr , nb_sector);
00617 break;
00618 # endif
00619 # if (LUN_1 == ENABLE)
00620 case LUN_ID_1:
00621 status = Lun_1_write_10(addr , nb_sector);
00622 break;
00623 # endif
00624 # if (LUN_2 == ENABLE)
00625 case LUN_ID_2:
00626 status = Lun_2_write_10(addr , nb_sector);
00627 break;
00628 # endif
00629 # if (LUN_3 == ENABLE)
00630 case LUN_ID_3:
00631 status = Lun_3_write_10(addr , nb_sector);
00632 break;
00633 # endif
00634 # if (LUN_4 == ENABLE)
00635 case LUN_ID_4:
00636 status = Lun_4_write_10(addr , nb_sector);
00637 break;
00638 # endif
00639 # if (LUN_5 == ENABLE)
00640 case LUN_ID_5:
00641 status = Lun_5_write_10(addr , nb_sector);
00642 break;
00643 # endif
00644 # if (LUN_6 == ENABLE)
00645 case LUN_ID_6:
00646 status = Lun_6_write_10(addr , nb_sector);
00647 break;
00648 # endif
00649 # if (LUN_7 == ENABLE)
00650 case LUN_ID_7:
00651 status = Lun_7_write_10(addr , nb_sector);
00652 break;
00653 # endif
00654 }
00655 return status;
00656 }
00657
00659 #if (ACCESS_MEM_TO_RAM == ENABLED)
00660
00673 Ctrl_status memory_2_ram( U8 lun , const U32 _MEM_TYPE_SLOW_ addr , U8 _MEM_TYPE_SLOW_ *ram )
00674 {
00675
00676 Ctrl_status status=CTRL_FAIL;
00677
00678 switch( lun )
00679 {
00680 # if (LUN_0 == ENABLE)
00681 case LUN_ID_0:
00682 status = Lun_0_mem_2_ram(addr , ram);
00683 break;
00684 # endif
00685 # if (LUN_1 == ENABLE)
00686 case LUN_ID_1:
00687 status = Lun_1_mem_2_ram(addr , ram);
00688 break;
00689 # endif
00690 # if (LUN_2 == ENABLE)
00691 case LUN_ID_2:
00692 status = Lun_2_mem_2_ram(addr , ram);
00693 break;
00694 # endif
00695 # if (LUN_3 == ENABLE)
00696 case LUN_ID_3:
00697 status = Lun_3_mem_2_ram(addr , ram);
00698 break;
00699 # endif
00700 # if (LUN_4 == ENABLE)
00701 case LUN_ID_4:
00702 status = Lun_4_mem_2_ram(addr , ram);
00703 break;
00704 # endif
00705 # if (LUN_5 == ENABLE)
00706 case LUN_ID_5:
00707 status = Lun_5_mem_2_ram(addr , ram);
00708 break;
00709 # endif
00710 # if (LUN_6 == ENABLE)
00711 case LUN_ID_6:
00712 status = Lun_6_mem_2_ram(addr , ram);
00713 break;
00714 # endif
00715 # if (LUN_7 == ENABLE)
00716 case LUN_ID_7:
00717 status = Lun_7_mem_2_ram(addr , ram);
00718 break;
00719 # endif
00720 # if (LUN_USB == ENABLE)
00721 default:
00722 return Lun_usb_mem_2_ram(lun - LUN_ID_USB,addr , ram);
00723 # endif
00724 }
00725 return status;
00726 }
00727 #endif // ACCESS_MEM_TO_RAM == ENABLED
00728
00729
00730
00731 #if (ACCESS_MEM_TO_RAM==ENABLE)
00732
00745 Ctrl_status ram_2_memory( U8 lun , const U32 _MEM_TYPE_SLOW_ addr , U8 _MEM_TYPE_SLOW_ * ram )
00746 {
00747 Ctrl_status status=CTRL_FAIL;
00748
00749 switch( lun )
00750 {
00751 # if (LUN_0 == ENABLE)
00752 case LUN_ID_0:
00753 status = Lun_0_ram_2_mem(addr , ram);
00754 break;
00755 # endif
00756 # if (LUN_1 == ENABLE)
00757 case LUN_ID_1:
00758 status = Lun_1_ram_2_mem(addr , ram);
00759 break;
00760 # endif
00761 # if (LUN_2 == ENABLE)
00762 case LUN_ID_2:
00763 status = Lun_2_ram_2_mem(addr , ram);
00764 break;
00765 # endif
00766 # if (LUN_3 == ENABLE)
00767 case LUN_ID_3:
00768 status = Lun_3_ram_2_mem(addr , ram);
00769 break;
00770 # endif
00771 # if (LUN_4 == ENABLE)
00772 case LUN_ID_4:
00773 status = Lun_4_ram_2_mem(addr , ram);
00774 break;
00775 # endif
00776 # if (LUN_5 == ENABLE)
00777 case LUN_ID_5:
00778 status = Lun_5_ram_2_mem(addr , ram);
00779 break;
00780 # endif
00781 # if (LUN_6 == ENABLE)
00782 case LUN_ID_6:
00783 status = Lun_6_ram_2_mem(addr , ram);
00784 break;
00785 # endif
00786 # if (LUN_7 == ENABLE)
00787 case LUN_ID_7:
00788 status = Lun_7_ram_2_mem(addr , ram);
00789 break;
00790 # endif
00791 # if (LUN_USB == ENABLE)
00792 default:
00793 return Lun_usb_ram_2_mem(lun - LUN_ID_USB,addr , ram);
00794 break;
00795 # endif
00796 }
00797 return status;
00798 }
00799
00800
00806 U8 stream_mem_to_mem( U8 src_lun , U32 src_addr , U8 dest_lun , U32 dest_addr , U16 nb_sector )
00807 {
00808 Ctrl_status status=CTRL_FAIL;
00809 fat_cache_flush();
00810 while(nb_sector)
00811 {
00812 status = memory_2_ram( src_lun , src_addr , fs_g_sector );
00813 if( status != CTRL_GOOD )
00814 break;
00815 status = ram_2_memory( dest_lun , dest_addr , fs_g_sector );
00816 if( status != CTRL_GOOD )
00817 break;
00818 src_addr++;
00819 dest_addr++;
00820 nb_sector--;
00821 }
00822 fat_cache_reset();
00823 return (status != CTRL_GOOD)? ID_STREAM_ERR:0;
00824 }
00825
00826
00836 Ctrl_status stream_state( U8 Id )
00837 {
00838 return CTRL_GOOD;
00839 }
00840
00847 U16 stream_stop( U8 Id )
00848 {
00849 return 0;
00850 }
00851
00852 #endif // ACCESS_RAM_TO_MEM == ENABLED
00853