include/dmac/dma_controller.h

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#ifndef DMA_CONTROLLER_H_INCLUDED
#define DMA_CONTROLLER_H_INCLUDED

#include <dma.h>
#include <slist.h>
#include <types.h>
#include <buffer.h>

#include <chip/dma_controller.h>

struct buffer;

struct dmac_channel;

enum dmac_reg_width {
        DMAC_REG_WIDTH_8BIT     = 0,    
        DMAC_REG_WIDTH_16BIT    = 1,    
        DMAC_REG_WIDTH_32BIT    = 2,    
};

enum dmac_burst_length {
        DMAC_BURST_LENGTH_1     = 0,    
        DMAC_BURST_LENGTH_4     = 1,    
        DMAC_BURST_LENGTH_8     = 2,    
        DMAC_BURST_LENGTH_16    = 3,    
        DMAC_BURST_LENGTH_32    = 4,    
};

struct dmac_request {
        struct slist            buf_list;
        struct slist_node       node;
        enum dma_direction      direction;
        enum dmac_reg_width     reg_width;
        enum dmac_burst_length burst_length;
        void                    (*req_done)(struct dmac_channel *chan,
                                        struct dmac_request *req);
        void                    *context;
        int                     status;
        size_t                  bytes_xfered;
};

struct dmac_channel {
        void    (*submit_req)(struct dmac_channel *chan,
                        struct dmac_request *req);
        void    (*reset)(struct dmac_channel *chan);
        size_t  max_buffer_size;
};

struct dma_controller {
        struct dmac_channel     *(*alloc_chan)(struct dma_controller *dmac,
                                        enum dmac_periph_id rx_periph,
                                        enum dmac_periph_id tx_periph,
                                        phys_addr_t rx_reg_addr,
                                        phys_addr_t tx_reg_addr);
        void                    (*free_chan)(struct dma_controller *dmac,
                                        struct dmac_channel *chan);
};

static inline struct dmac_channel *dmac_alloc_channel(
                struct dma_controller *dmac,
                enum dmac_periph_id rx_periph,
                enum dmac_periph_id tx_periph,
                phys_addr_t rx_reg_addr,
                phys_addr_t tx_reg_addr)
{
        return dmac->alloc_chan(dmac, rx_periph, tx_periph,
                        rx_reg_addr, tx_reg_addr);
}

static inline void dmac_free_channel(struct dma_controller *dmac,
                struct dmac_channel *chan)
{
        dmac->free_chan(dmac, chan);
}

static inline void dmac_chan_submit_request(struct dmac_channel *chan,
                struct dmac_request *req)
{
        chan->submit_req(chan, req);
}

static inline void dmac_chan_reset(struct dmac_channel *chan)
{
        chan->reset(chan);
}

static inline void dmac_req_init(struct dmac_request *req)
{
        slist_init(&req->buf_list);
}

static inline void dmac_req_add_buffer(struct dmac_request *req,
                struct buffer *buf)
{
        slist_insert_tail(&req->buf_list, &buf->node);
}

#define dmac_req_for_each_buffer(req, buf)                      \
        slist_for_each(&req->buf_list, buf, node)

#define dmac_req_for_each_buffer_safe(req, buf, buf_next)       \
        slist_for_each_safe(&req->buf_list, buf, buf_next, node)

#endif /* DMA_CONTROLLER_H_INCLUDED */

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