chip/at32uc3a3/include/chip/dma_controller.h

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#ifndef CHIP_DMA_CONTROLLER_H_INCLUDED
#define CHIP_DMA_CONTROLLER_H_INCLUDED

#include <chip/memory-map.h>
#include <dmac/dmaca.h>
#include <dmac/pdca.h>

enum dmac_periph_id {
        /* DMACA Peripheral IDs */
        DMAC_PERIPH_AES_RX      = 0x00, 
        DMAC_PERIPH_AES_TX,             
        DMAC_PERIPH_MCI_RX,             
        DMAC_PERIPH_MCI_TX,             
        DMAC_PERIPH_MSI_RX,             
        DMAC_PERIPH_MSI_TX,             
        DMAC_PERIPH_EXT0,               
        DMAC_PERPIH_EXT1,               

        /* PDCA Peripheral IDs */
        DMAC_PERIPH_ADC_RX      = 0x20, 
        DMAC_PERIPH_SSC_RX,             
        DMAC_PERIPH_USART0_RX,          
        DMAC_PERIPH_USART1_RX,          
        DMAC_PERIPH_USART2_RX,          
        DMAC_PERIPH_USART3_RX,          
        DMAC_PERIPH_TWIM0_RX,           
        DMAC_PERIPH_TWIM1_RX,           
        DMAC_PERIPH_TWIS0_RX,           
        DMAC_PERIPH_TWIS1_RX,           
        DMAC_PERIPH_SPI0_RX,            
        DMAC_PERIPH_SPI1_RX,            
        DMAC_PERIPH_SSC_TX,             
        DMAC_PERIPH_USART0_TX,          
        DMAC_PERIPH_USART1_TX,          
        DMAC_PERIPH_USART2_TX,          
        DMAC_PERIPH_USART3_TX,          
        DMAC_PERIPH_TWIM0_TX,           
        DMAC_PERIPH_TWIM1_TX,           
        DMAC_PERIPH_TWIS0_TX,           
        DMAC_PERIPH_TWIS1_TX,           
        DMAC_PERIPH_SPI0_TX,            
        DMAC_PERIPH_SPI1_TX,            
        DMAC_PERIPH_DAC_TX,             

        /* Dummy ID indicating "no peripheral" */
        DMAC_PERIPH_NONE        = 0xff, 
};

static inline unsigned int dmaca_get_periph_id(enum dmac_periph_id dmac_id)
{
        return dmac_id;
}

static inline unsigned int pdca_get_periph_id(enum dmac_periph_id dmac_id)
{
        return dmac_id - 0x20;
}

/* FIXME: Missing from the documentation */
#define CHIP_DMACA_NR_CHANNELS          4
#define CHIP_PDCA_NR_CHANNELS           8

#define PDCA_NR_PERIPH_IDS              24

static inline struct dmac_channel *dmac_aes_alloc_tx_channel(void)
{
        return dmaca_alloc_channel(&dmaca_controller, DMAC_PERIPH_NONE,
                        DMAC_PERIPH_AES_TX, 0, AES_BASE + 0x40);
}

static inline struct dmac_channel *dmac_aes_alloc_rx_channel(void)
{
        return dmaca_alloc_channel(&dmaca_controller, DMAC_PERIPH_AES_RX,
                        DMAC_PERIPH_NONE, AES_BASE + 0x50, 0);
}

static inline void dmac_aes_free_channel(struct dmac_channel *chan)
{
        dmaca_free_channel(&dmaca_controller, chan);
}

static inline struct dmac_channel *dmac_mci_alloc_channel(void)
{
        return dmaca_alloc_channel(&dmaca_controller, DMAC_PERIPH_MCI_RX,
                        DMAC_PERIPH_MCI_TX, MCI_BASE + 0x30, MCI_BASE + 0x34);
}

static inline void dmac_mci_free_channel(struct dmac_channel *chan)
{
        dmaca_free_channel(&dmaca_controller, chan);
}

extern struct dma_controller pdca_controller;

static inline struct dmac_channel *dmac_spi_alloc_tx_channel(
                unsigned int id)
{
        assert(id <= 1);

        switch (id) {
        case 0:
                return pdca_alloc_channel(&pdca_controller, DMAC_PERIPH_NONE,
                                DMAC_PERIPH_SPI0_TX, 0, SPI0_BASE + 0x0C);
        case 1:
                return pdca_alloc_channel(&pdca_controller, DMAC_PERIPH_NONE,
                                DMAC_PERIPH_SPI1_TX, 0, SPI1_BASE + 0x0C);
        default:
                return NULL;
        }
}

static inline struct dmac_channel *dmac_spi_alloc_rx_channel(
                unsigned int id)
{
        assert(id <= 1);

        switch (id) {
        case 0:
                return pdca_alloc_channel(&pdca_controller,
                                DMAC_PERIPH_SPI0_RX, DMAC_PERIPH_NONE,
                                SPI0_BASE + 0x08, 0);
        case 1:
                return pdca_alloc_channel(&pdca_controller,
                                DMAC_PERIPH_SPI1_RX, DMAC_PERIPH_NONE,
                                SPI1_BASE + 0x08, 0);
        default:
                return NULL;
        }
}

static inline void dmac_spi_free_channel(struct dmac_channel *chan)
{
        pdca_free_channel(&pdca_controller, chan);
}

#endif /* CHIP_DMA_CONTROLLER_H_INCLUDED */

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