ctrl_access.c

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00001 /*This file is prepared for Doxygen automatic documentation generation.*/
00016 
00017 /* Copyright (c) 2009 Atmel Corporation. All rights reserved.
00018  *
00019  * Redistribution and use in source and binary forms, with or without
00020  * modification, are permitted provided that the following conditions are met:
00021  *
00022  * 1. Redistributions of source code must retain the above copyright notice,
00023  * this list of conditions and the following disclaimer.
00024  *
00025  * 2. Redistributions in binary form must reproduce the above copyright notice,
00026  * this list of conditions and the following disclaimer in the documentation
00027  * and/or other materials provided with the distribution.
00028  *
00029  * 3. The name of Atmel may not be used to endorse or promote products derived
00030  * from this software without specific prior written permission.
00031  *
00032  * 4. This software may only be redistributed and used in connection with an Atmel
00033  * AVR product.
00034  *
00035  * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
00036  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00037  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE EXPRESSLY AND
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00042  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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00046 
00047 //_____ I N C L U D E S ____________________________________________________
00048 
00049 #include "config.h"
00050 #include "ctrl_access.h"
00051 
00052 
00053 //_____ D E F I N I T I O N S ______________________________________________
00054 
00055 #if (ACCESS_MEM_TO_RAM == ENABLED)
00056    #include "modules/file_system/fat.h"
00057 #endif
00058 
00059 
00061 // FYC: Memory = Logical Unit
00062 
00063 
00064                // CHECK FOR LUN DEFINE
00065 #ifndef  LUN_0
00066    #  error LUN_0 must be defined with ENABLE or DISABLE in conf_access.h
00067 #endif
00068 #ifndef  LUN_1
00069    #  error LUN_1 must be defined with ENABLE or DISABLE in conf_access.h
00070 #endif
00071 #ifndef  LUN_2
00072    #  error LUN_2 must be defined with ENABLE or DISABLE in conf_access.h
00073 #endif
00074 #ifndef  LUN_3
00075    #  error LUN_3 must be defined with ENABLE or DISABLE in conf_access.h
00076 #endif
00077 #ifndef  LUN_4
00078    #  error LUN_4 must be defined with ENABLE or DISABLE in conf_access.h
00079 #endif
00080 #ifndef  LUN_5
00081    #  error LUN_5 must be defined with ENABLE or DISABLE in conf_access.h
00082 #endif
00083 #ifndef  LUN_6
00084    #  error LUN_6 must be defined with ENABLE or DISABLE in conf_access.h
00085 #endif
00086 #ifndef  LUN_7
00087    #  error LUN_7 must be defined with ENABLE or DISABLE in conf_access.h
00088 #endif
00089 #ifndef  LUN_USB
00090    #  error LUN_USB must be defined with ENABLE or DISABLE in conf_access.h
00091 #endif
00092 
00093 
00094 #if (LUN_0 == ENABLE)
00095    #define     LUN_0_EN   1
00096    U8 code  lun0_name[]=LUN_0_NAME;
00097    #else
00098    #define   LUN_0_EN   0
00099 #endif
00100 #if (LUN_1 == ENABLE)
00101    #define     LUN_1_EN   1
00102    U8 code  lun1_name[]=LUN_1_NAME;
00103    #else
00104    #define     LUN_1_EN   0
00105 #endif
00106 #if (LUN_2 == ENABLE)
00107    #define     LUN_2_EN   1
00108    U8 code  lun2_name[]=LUN_2_NAME;
00109    #else
00110    #define     LUN_2_EN   0
00111 #endif
00112 #if (LUN_3 == ENABLE)
00113    #define     LUN_3_EN   1
00114    U8 code  lun3_name[]=LUN_3_NAME;
00115    #else
00116    #define     LUN_3_EN   0
00117 #endif
00118 #if (LUN_4 == ENABLE)
00119    #define     LUN_4_EN   1
00120    U8 code  lun4_name[]=LUN_4_NAME;
00121    #else
00122    #define     LUN_4_EN   0
00123 #endif
00124 #if (LUN_5 == ENABLE)
00125    #define     LUN_5_EN   1
00126    U8 code  lun5_name[]=LUN_5_NAME;
00127    #else
00128    #define     LUN_5_EN   0
00129 #endif
00130 #if (LUN_6 == ENABLE)
00131    #define     LUN_6_EN   1
00132    U8 code  lun6_name[]=LUN_6_NAME;
00133    #else
00134    #define     LUN_6_EN   0
00135 #endif
00136 #if (LUN_7 == ENABLE)
00137    #define     LUN_7_EN   1
00138    U8 code  lun7_name[]=LUN_7_NAME;
00139    #else
00140    #define     LUN_7_EN   0
00141 #endif
00142 #if (LUN_USB == ENABLE)
00143    #define     LUN_USB_EN   1
00144    U8 code  lunusb_name[]=LUN_USB_NAME;
00145    #else
00146    #define     LUN_USB_EN   0
00147 #endif
00148 
00149 
00150 #define  LUN_ID_0        (0)
00151 #define  LUN_ID_1        (LUN_0_EN)
00152 #define  LUN_ID_2        (LUN_0_EN+LUN_1_EN)
00153 #define  LUN_ID_3        (LUN_0_EN+LUN_1_EN+LUN_2_EN)
00154 #define  LUN_ID_4        (LUN_0_EN+LUN_1_EN+LUN_2_EN+LUN_3_EN)
00155 #define  LUN_ID_5        (LUN_0_EN+LUN_1_EN+LUN_2_EN+LUN_3_EN+LUN_4_EN)
00156 #define  LUN_ID_6        (LUN_0_EN+LUN_1_EN+LUN_2_EN+LUN_3_EN+LUN_4_EN+LUN_5_EN)
00157 #define  LUN_ID_7        (LUN_0_EN+LUN_1_EN+LUN_2_EN+LUN_3_EN+LUN_4_EN+LUN_5_EN+LUN_6_EN)
00158 #define  MAX_LUN         (LUN_0_EN+LUN_1_EN+LUN_2_EN+LUN_3_EN+LUN_4_EN+LUN_5_EN+LUN_6_EN+LUN_7_EN)
00159 #define  LUN_ID_USB      (MAX_LUN)
00160 
00161 // Check configuration
00162 #if (MAX_LUN == 0 && LUN_USB ==DISABLE )
00163    #error No memory is active in conf_access.h
00164 #endif
00165 
00166 
00167 //*************************************************************************
00168 //**** Listing of commun interface ****************************************
00169 //*************************************************************************
00170 
00175 U8    get_nb_lun()
00176 {
00177 #if   (LUN_USB == ENABLED)
00178    host_ms_max_lun=0;
00179    for(dms_selected=0;dms_selected<dms_connected;dms_selected++)
00180    {
00181       host_ms_max_lun += Host_getlun();
00182    }
00183    return   (MAX_LUN + host_ms_max_lun);
00184 #else
00185    return   MAX_LUN;
00186 #endif
00187 }
00188 
00189 
00194 U8    get_cur_lun()
00195 {
00196    return   0; //TODO a specific management
00197 }
00198 
00199 
00213 Ctrl_status mem_test_unit_ready( U8 lun )
00214 {
00215    switch( lun )
00216    {
00217 #     if (LUN_0 == ENABLE)
00218       case LUN_ID_0:
00219       return Lun_0_test_unit_ready();
00220       break;
00221 #     endif
00222 #     if (LUN_1 == ENABLE)
00223       case LUN_ID_1:
00224       return Lun_1_test_unit_ready();
00225       break;
00226 #     endif
00227 #     if (LUN_2 == ENABLE)
00228       case LUN_ID_2:
00229       return Lun_2_test_unit_ready();
00230       break;
00231 #     endif
00232 #     if (LUN_3 == ENABLE)
00233       case LUN_ID_3:
00234       return Lun_3_test_unit_ready();
00235       break;
00236 #     endif
00237 #     if (LUN_4 == ENABLE)
00238       case LUN_ID_4:
00239       return Lun_4_test_unit_ready();
00240       break;
00241 #     endif
00242 #     if (LUN_5 == ENABLE)
00243       case LUN_ID_5:
00244       return Lun_5_test_unit_ready();
00245       break;
00246 #     endif
00247 #     if (LUN_6 == ENABLE)
00248       case LUN_ID_6:
00249       return Lun_6_test_unit_ready();
00250       break;
00251 #     endif
00252 #     if (LUN_7 == ENABLE)
00253       case LUN_ID_7:
00254       return Lun_7_test_unit_ready();
00255       break;
00256 #     endif
00257 #     if (LUN_USB == ENABLE)
00258       default:
00259       return Lun_usb_test_unit_ready(lun - LUN_ID_USB);
00260       break;
00261 #     endif
00262    }
00263    return   CTRL_FAIL;
00264 }
00265 
00266 
00276 Ctrl_status mem_read_capacity( U8 lun , U32 _MEM_TYPE_SLOW_ *u32_last_sector )
00277 {
00278    switch( lun )
00279    {
00280 #     if (LUN_0 == ENABLE)
00281       case LUN_ID_0:
00282       return Lun_0_read_capacity( u32_last_sector );
00283       break;
00284 #     endif
00285 #     if (LUN_1 == ENABLE)
00286       case LUN_ID_1:
00287       return Lun_1_read_capacity( u32_last_sector );
00288       break;
00289 #     endif
00290 #     if (LUN_2 == ENABLE)
00291       case LUN_ID_2:
00292       return Lun_2_read_capacity( u32_last_sector );
00293       break;
00294 #     endif
00295 #     if (LUN_3 == ENABLE)
00296       case LUN_ID_3:
00297       return Lun_3_read_capacity( u32_last_sector );
00298       break;
00299 #     endif
00300 #     if (LUN_4 == ENABLE)
00301       case LUN_ID_4:
00302       return Lun_4_read_capacity( u32_last_sector );
00303       break;
00304 #     endif
00305 #     if (LUN_5 == ENABLE)
00306       case LUN_ID_5:
00307       return Lun_5_read_capacity( u32_last_sector );
00308       break;
00309 #     endif
00310 #     if (LUN_6 == ENABLE)
00311       case LUN_ID_6:
00312       return Lun_6_read_capacity( u32_last_sector );
00313       break;
00314 #     endif
00315 #     if (LUN_7 == ENABLE)
00316       case LUN_ID_7:
00317       return Lun_7_read_capacity( u32_last_sector );
00318       break;
00319 #     endif
00320 #     if (LUN_USB == ENABLE)
00321       default:
00322       return Lun_usb_read_capacity( lun - LUN_ID_USB, u32_last_sector );
00323       break;
00324 #     endif
00325    }
00326    return   CTRL_FAIL;
00327 }
00328 
00329 
00336 U8 mem_sector_size( U8 lun )
00337 {
00338 # if (LUN_USB == ENABLE)
00339   return (lun < LUN_ID_USB) ? 1 : 1; // TODO , add new USB mass-storage driver to manage specific disk capacity
00340 #else
00341   return 1;
00342 #endif
00343 }
00344 
00345 
00355 Bool  mem_wr_protect( U8 lun )
00356 {
00357    switch( lun )
00358    {
00359 #     if (LUN_0 == ENABLE)
00360       case LUN_ID_0:
00361       return Lun_0_wr_protect();
00362       break;
00363 #     endif
00364 #     if (LUN_1 == ENABLE)
00365       case LUN_ID_1:
00366       return Lun_1_wr_protect();
00367       break;
00368 #     endif
00369 #     if (LUN_2 == ENABLE)
00370       case LUN_ID_2:
00371       return Lun_2_wr_protect();
00372       break;
00373 #     endif
00374 #     if (LUN_3 == ENABLE)
00375       case LUN_ID_3:
00376       return Lun_3_wr_protect();
00377       break;
00378 #     endif
00379 #     if (LUN_4 == ENABLE)
00380       case LUN_ID_4:
00381       return Lun_4_wr_protect();
00382       break;
00383 #     endif
00384 #     if (LUN_5 == ENABLE)
00385       case LUN_ID_5:
00386       return Lun_5_wr_protect();
00387       break;
00388 #     endif
00389 #     if (LUN_6 == ENABLE)
00390       case LUN_ID_6:
00391       return Lun_6_wr_protect();
00392       break;
00393 #     endif
00394 #     if (LUN_7 == ENABLE)
00395       case LUN_ID_7:
00396       return Lun_7_wr_protect();
00397       break;
00398 #     endif
00399 #     if (LUN_USB == ENABLE)
00400       default:
00401       return Lun_usb_wr_protect(lun - LUN_ID_USB);
00402       break;
00403 #     endif
00404    }
00405    return   CTRL_FAIL;
00406 }
00407 
00408 
00415 Bool  mem_removal( U8 lun )
00416 {
00417    switch( lun )
00418    {
00419 #     if (LUN_0 == ENABLE)
00420       case LUN_ID_0:
00421       return Lun_0_removal();
00422       break;
00423 #     endif
00424 #     if (LUN_1 == ENABLE)
00425       case LUN_ID_1:
00426       return Lun_1_removal();
00427       break;
00428 #     endif
00429 #     if (LUN_2 == ENABLE)
00430       case LUN_ID_2:
00431       return Lun_2_removal();
00432       break;
00433 #     endif
00434 #     if (LUN_3 == ENABLE)
00435       case LUN_ID_3:
00436       return Lun_3_removal();
00437       break;
00438 #     endif
00439 #     if (LUN_4 == ENABLE)
00440       case LUN_ID_4:
00441       return Lun_4_removal();
00442       break;
00443 #     endif
00444 #     if (LUN_5 == ENABLE)
00445       case LUN_ID_5:
00446       return Lun_5_removal();
00447       break;
00448 #     endif
00449 #     if (LUN_6 == ENABLE)
00450       case LUN_ID_6:
00451       return Lun_6_removal();
00452       break;
00453 #     endif
00454 #     if (LUN_7 == ENABLE)
00455       case LUN_ID_7:
00456       return Lun_7_removal();
00457       break;
00458 #     endif
00459 #     if (LUN_USB == ENABLE)
00460       default:
00461       return Lun_usb_removal();
00462       break;
00463 #     endif
00464    }
00465    return   CTRL_FAIL;
00466 }
00467 
00468 
00475 #ifdef __GNUC__
00476 U8* mem_name( U8 lun )
00477 #else
00478 U8 code*  mem_name( U8 lun )
00479 #endif
00480 {
00481    switch( lun )
00482    {
00483 #     if (LUN_0 == ENABLE)
00484       case LUN_ID_0:
00485       return (U8 code*)lun0_name;
00486       break;
00487 #     endif
00488 #     if (LUN_1 == ENABLE)
00489       case LUN_ID_1:
00490       return (U8 code*)lun1_name;
00491       break;
00492 #     endif
00493 #     if (LUN_2 == ENABLE)
00494       case LUN_ID_2:
00495       return (U8 code*)lun2_name;
00496       break;
00497 #     endif
00498 #     if (LUN_3 == ENABLE)
00499       case LUN_ID_3:
00500       return (U8 code*)lun3_name;
00501       break;
00502 #     endif
00503 #     if (LUN_4 == ENABLE)
00504       case LUN_ID_4:
00505       return (U8 code*)lun4_name;
00506       break;
00507 #     endif
00508 #     if (LUN_5 == ENABLE)
00509       case LUN_ID_5:
00510       return (U8 code*)lun5_name;
00511       break;
00512 #     endif
00513 #     if (LUN_6 == ENABLE)
00514       case LUN_ID_6:
00515       return (U8 code*)lun6_name;
00516       break;
00517 #     endif
00518 #     if (LUN_7 == ENABLE)
00519       case LUN_ID_7:
00520       return (U8 code*)lun7_name;
00521       break;
00522 #     endif
00523 #     if (LUN_USB == ENABLE)
00524       default:
00525       return (U8 code*)lunusb_name;
00526       break;
00527 #     endif
00528    }
00529    return 0;   // Remove compiler warning
00530 }
00531 
00532 
00533 
00534 //*************************************************************************
00535 //**** Listing of READ/WRITE interface ************************************
00536 //*************************************************************************
00537 
00538 
00550 Ctrl_status    memory_2_usb( U8 lun , U32 addr , U16 nb_sector )
00551 {
00552    Ctrl_status status=CTRL_FAIL;
00553 
00554    switch( lun )
00555    {
00556 #     if (LUN_0 == ENABLE)
00557       case LUN_ID_0:
00558       status = Lun_0_read_10(addr , nb_sector);
00559       break;
00560 #     endif
00561 #     if (LUN_1 == ENABLE)
00562       case LUN_ID_1:
00563       status = Lun_1_read_10(addr , nb_sector);
00564       break;
00565 #     endif
00566 #     if (LUN_2 == ENABLE)
00567       case LUN_ID_2:
00568       status = Lun_2_read_10(addr , nb_sector);
00569       break;
00570 #     endif
00571 #     if (LUN_3 == ENABLE)
00572       case LUN_ID_3:
00573       status = Lun_3_read_10(addr , nb_sector);
00574       break;
00575 #     endif
00576 #     if (LUN_4 == ENABLE)
00577       case LUN_ID_4:
00578       status = Lun_4_read_10(addr , nb_sector);
00579       break;
00580 #     endif
00581 #     if (LUN_5 == ENABLE)
00582       case LUN_ID_5:
00583       status = Lun_5_read_10(addr , nb_sector);
00584       break;
00585 #     endif
00586 #     if (LUN_6 == ENABLE)
00587       case LUN_ID_6:
00588       status = Lun_6_read_10(addr , nb_sector);
00589       break;
00590 #     endif
00591 #     if (LUN_7 == ENABLE)
00592       case LUN_ID_7:
00593       status = Lun_7_read_10(addr , nb_sector);
00594       break;
00595 #     endif
00596    }
00597    return   status;
00598 }
00599 
00611 Ctrl_status    usb_2_memory( U8 lun , U32 addr , U16 nb_sector )
00612 {
00613    Ctrl_status status=CTRL_FAIL;
00614 
00615    switch( lun )
00616    {
00617 #     if (LUN_0 == ENABLE)
00618       case LUN_ID_0:
00619       status = Lun_0_write_10(addr , nb_sector);
00620       break;
00621 #     endif
00622 #     if (LUN_1 == ENABLE)
00623       case LUN_ID_1:
00624       status = Lun_1_write_10(addr , nb_sector);
00625       break;
00626 #     endif
00627 #     if (LUN_2 == ENABLE)
00628       case LUN_ID_2:
00629       status = Lun_2_write_10(addr , nb_sector);
00630       break;
00631 #     endif
00632 #     if (LUN_3 == ENABLE)
00633       case LUN_ID_3:
00634       status = Lun_3_write_10(addr , nb_sector);
00635       break;
00636 #     endif
00637 #     if (LUN_4 == ENABLE)
00638       case LUN_ID_4:
00639       status = Lun_4_write_10(addr , nb_sector);
00640       break;
00641 #     endif
00642 #     if (LUN_5 == ENABLE)
00643       case LUN_ID_5:
00644       status = Lun_5_write_10(addr , nb_sector);
00645       break;
00646 #     endif
00647 #     if (LUN_6 == ENABLE)
00648       case LUN_ID_6:
00649       status = Lun_6_write_10(addr , nb_sector);
00650       break;
00651 #     endif
00652 #     if (LUN_7 == ENABLE)
00653       case LUN_ID_7:
00654       status = Lun_7_write_10(addr , nb_sector);
00655       break;
00656 #     endif
00657    }
00658    return   status;
00659 }
00660 
00662 #if (ACCESS_MEM_TO_RAM == ENABLED)
00663 
00676 Ctrl_status    memory_2_ram( U8 lun , const U32 _MEM_TYPE_SLOW_ addr , U8 _MEM_TYPE_SLOW_ *ram )
00677 {
00678 
00679    Ctrl_status status=CTRL_FAIL;
00680 
00681    switch( lun )
00682    {
00683 #     if (LUN_0 == ENABLE)
00684       case LUN_ID_0:
00685       status = Lun_0_mem_2_ram(addr , ram);
00686       break;
00687 #     endif
00688 #     if (LUN_1 == ENABLE)
00689       case LUN_ID_1:
00690       status = Lun_1_mem_2_ram(addr , ram);
00691       break;
00692 #     endif
00693 #     if (LUN_2 == ENABLE)
00694       case LUN_ID_2:
00695       status = Lun_2_mem_2_ram(addr , ram);
00696       break;
00697 #     endif
00698 #     if (LUN_3 == ENABLE)
00699       case LUN_ID_3:
00700       status = Lun_3_mem_2_ram(addr , ram);
00701       break;
00702 #     endif
00703 #     if (LUN_4 == ENABLE)
00704       case LUN_ID_4:
00705       status = Lun_4_mem_2_ram(addr , ram);
00706       break;
00707 #     endif
00708 #     if (LUN_5 == ENABLE)
00709       case LUN_ID_5:
00710       status = Lun_5_mem_2_ram(addr , ram);
00711       break;
00712 #     endif
00713 #     if (LUN_6 == ENABLE)
00714       case LUN_ID_6:
00715       status = Lun_6_mem_2_ram(addr , ram);
00716       break;
00717 #     endif
00718 #     if (LUN_7 == ENABLE)
00719       case LUN_ID_7:
00720       status = Lun_7_mem_2_ram(addr , ram);
00721       break;
00722 #     endif
00723 #     if (LUN_USB == ENABLE)
00724       default:
00725       return  Lun_usb_mem_2_ram(lun - LUN_ID_USB,addr , ram);
00726 #     endif
00727    }
00728    return   status;
00729 }
00730 #endif // ACCESS_MEM_TO_RAM == ENABLED
00731 
00732 
00733 
00734 #if (ACCESS_MEM_TO_RAM==ENABLE)
00735 
00748 Ctrl_status    ram_2_memory( U8 lun , const U32 _MEM_TYPE_SLOW_ addr , U8 _MEM_TYPE_SLOW_ * ram )
00749 {
00750    Ctrl_status status=CTRL_FAIL;
00751 
00752    switch( lun )
00753    {
00754 #     if (LUN_0 == ENABLE)
00755       case LUN_ID_0:
00756       status = Lun_0_ram_2_mem(addr , ram);
00757       break;
00758 #     endif
00759 #     if (LUN_1 == ENABLE)
00760       case LUN_ID_1:
00761       status = Lun_1_ram_2_mem(addr , ram);
00762       break;
00763 #     endif
00764 #     if (LUN_2 == ENABLE)
00765       case LUN_ID_2:
00766       status = Lun_2_ram_2_mem(addr , ram);
00767       break;
00768 #     endif
00769 #     if (LUN_3 == ENABLE)
00770       case LUN_ID_3:
00771       status = Lun_3_ram_2_mem(addr , ram);
00772       break;
00773 #     endif
00774 #     if (LUN_4 == ENABLE)
00775       case LUN_ID_4:
00776       status = Lun_4_ram_2_mem(addr , ram);
00777       break;
00778 #     endif
00779 #     if (LUN_5 == ENABLE)
00780       case LUN_ID_5:
00781       status = Lun_5_ram_2_mem(addr , ram);
00782       break;
00783 #     endif
00784 #     if (LUN_6 == ENABLE)
00785       case LUN_ID_6:
00786       status = Lun_6_ram_2_mem(addr , ram);
00787       break;
00788 #     endif
00789 #     if (LUN_7 == ENABLE)
00790       case LUN_ID_7:
00791       status = Lun_7_ram_2_mem(addr , ram);
00792       break;
00793 #     endif
00794 #     if (LUN_USB == ENABLE)
00795       default:
00796       return  Lun_usb_ram_2_mem(lun - LUN_ID_USB,addr , ram);
00797       break;
00798 #     endif
00799    }
00800    return   status;
00801 }
00802 
00803 
00809 U8    stream_mem_to_mem( U8 src_lun , U32 src_addr , U8 dest_lun , U32 dest_addr , U16 nb_sector )
00810 {
00811    Ctrl_status status=CTRL_FAIL;
00812    fat_cache_flush();
00813    while(nb_sector)
00814    {
00815       status = memory_2_ram( src_lun , src_addr , fs_g_sector );
00816       if( status != CTRL_GOOD )
00817          break;
00818       status = ram_2_memory( dest_lun , dest_addr , fs_g_sector );
00819       if( status != CTRL_GOOD )
00820          break;
00821       src_addr++;
00822       dest_addr++;
00823       nb_sector--;
00824    }
00825    fat_cache_reset();
00826    return (status != CTRL_GOOD)? ID_STREAM_ERR:0;
00827 }
00828 
00829 
00839 Ctrl_status stream_state( U8 Id )
00840 {
00841    return CTRL_GOOD;
00842 }
00843 
00850 U16 stream_stop( U8 Id )
00851 {
00852    return 0;
00853 }
00854 
00855 #endif   // ACCESS_RAM_TO_MEM == ENABLED
00856 

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